A 108dB DR -μM Front-End with 720mVpp Input Range and >300mV Offset Removal for Multi-Parameter Biopotential Recording.

2021 
The recording of biopotential signals using techniques such as electroencephalography (EEG) and electrocardiography (ECG) poses important challenges to the design of the front-end readout circuits in terms of noise, electrode DC offset cancellation and motion artifact tolerance. In this paper, we present a 2nd-order hybrid-CTDT - modulator front-end architecture that tackles these challenges by taking advantage of the over-sampling and noise-shaping characteristics of a traditional modulator, while employing an extra -stage in the feedback loop to remove electrode DC offsets and accommodate motion artifacts. To meet the stringent noise requirements of this application, a capacitively-coupled chopper-stabilized amplifier located in the forward path of the modulator loop serves simultaneously as an input stage and an active adder. A prototype of this direct-to-digital front-end chip is fabricated in a standard 0.18 μm CMOS process and achieves a peak SNR of 105.6dB and a dynamic range of 108.3dB, for a maximum input range of 720 mVpp. The measured input-referred noise is 0.98 Vrms over a bandwidth of 0.5-100 Hz, and the measured CMRR is >100 dB. ECG and EEG measurements in human subjects demonstrate the capability of this architecture to acquire biopotential signals in the presence of large motion artifacts.
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