Hyper Suprime-Cam: development of the CCD readout electronics
2010
Hyper Suprime-Cam (HSC) employs 116 of 2k×4k CCDs with 464 signal outputs in total. The image size
exceeds 2 GBytes, and the data can be readout every 10 seconds which results in the data rate of 210 Mbytes /
sec. The data is digitized to 16-bit. The readout noise of the electronics at the readout time of 20 seconds is
~0.9 ADU, and the one with CCD is ~1.5 ADU which corresponds to ~4.5 e. The linearity error fits within ±
0.5 % up to 150,000 e. The CCD readout electronics for HSC was newly developed based on the electronics
for Suprime-Cam. The frontend electronics (FEE) is placed in the vacuum dewar, and the backend electronics
(BEE) is mounted on the outside of the dewar on the prime focus unit. The FEE boards were designed to
minimize the outgas and to maximize the heat transfer efficiency to keep the vacuum of the dewar. The BEE
boards were designed to be simple and small as long as to achieve the readout time within 10 seconds. The
production of the system has been finished, and the full set of the boards are being tested with several CCDs
installed in the HSC dewar. We will show the system design, performance, and the current status of the
development.
Keywords:
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
0
References
9
Citations
NaN
KQI