Self-aligned n-channel GaAs metal-oxide-semiconductor field-effect transistors (MOSFETs) using HfO2 and silicon interface passivation layer: Post-metal annealing optimization

In this work, using Si interface passivation layer (IPL), we demonstrate n- MOSFETon p-type GaAs by varying physical-vapor-deposition(PVD) Si IPL thickness, S/D ion implantation condition, and different substrate doping concentration and post-metal annealing (PMA) condition. Using the optimized process, TaN/HfO"2/GaAs n- MOSFETsmade on p-GaAs substrates exhibit good electrical characteristics, equivalent oxide thickness(EOT) (~3.7nm), frequency dispersion (~8%) and high maximum mobility (420cm^2/Vs) with high temperature PMA (950^oC, 1min) and good inversion.