Reactive ion etch of silicon nitride spacer with high selectivity to oxide

A highly uniform and selective nitride spacer etch process for use in advanced sub-0.35 /spl mu/m devices has been developed in the Dielectric Etch M/spl times/P+ MERIE chamber. One application involves etching the nitride film down to the gate oxide with minimal oxide loss. The nitride spacer process is also used to etch the nitride and oxide while stopping on the silicon. This process was developed for both 150 mm and 200 mm M/spl times/P+ chambers. Obtaining a good uniformity and high selectivities while maintaining a vertical profile is essential to a production worthy process. A CHF/sub 3//Ar based main etch process provides a controllable nitride etch rate (800-1700 /spl Aring//min) with good uniformity (/spl sim/4%, max-min/2*ave) while providing a proper profile and maintaining the spacer width. This main etch process gives a high selectivity to silicon. A second, CH/sub 3/F/O/sub 2/ based process step is used for overetch past the endpoint to stop on oxide with minimal oxide loss (<50 /spl Aring/).