Measuring Strain in Semiconductor Nanostructures by Convergent Beam Electron Diffraction

Convergent beam electron diffraction (CBED) experiments and simulations, and finite element calculations are used to measure the strain and stress in a complex device such as a series of periodic MOS transistors. When approaching the transistor active regions, the HOLZ lines in the CBED patterns acquired in the silicon substrate, become increasingly broad. This HOLZ line broadening, which is due to the relaxation of stress in the lamella, is used to determine quantitatively the strain and stress in the thin lamella and then in the bulk device. Two parameters, the intrinsic material stresses in the NiSi and Si3N4 layers of the transistors, are successfully fitted by trial and error. These fitted values are, respectively, equal to 1.2 and 0.95GPa.