Design of the PSC: A Programmable Systolic Chip

The programmable systolicchip (PSC) is a high performance, special-purpose, single-chip microprocessorintended to be used in groups of tens or hundreds for the efficient implementation of a broad variety of systolic arrays. For implementing these systolic arrays, the PSC is expected to be at least an order of magnitude more efticient than conventional microprocessors, llie development of the PSC design, from initial concept to a silicon layout, took slightly less than a year, This project represents an integration of many disciplines including applications, algorithms, architecture, microprocessordesign, and chip layout. This paper describes the goals of the project, tlie design process, major design features and current status.