Self-Aligned n-channel MOSFET on InP and In 0.53 Ga 0.47 As Using Physical Vapor Deposition HfO 2 and Silicon Interface Passivation Layer

Research on high-k (HfO 2 ) materials has been expanded significantly. However, MOSFETswith high-k gate dielectricson silicon still have several problems with relatively low mobility of high-k devices in thin EOT regime compared to the universal curve. In this work, as an alternative of silicon substrate, InP and In 0.53 Ga 0.47 As has been studied. W e present the material and electrical characteristics of TaN/HfO 2 /InP self-aligned n- MOSFETwith PVD Si interface Passivation layer (IPL) under various post deposition anneal (PDA) conditions. We also demonstrated N-channel high-k InP and In 0.53 Ga 0.47 As MOSFETswith good transistor behavior.