Design of a mezzanine card with bandwidth aggregation for HPGe gamma spectroscopy

In experimental nuclear physics, HPGe segmented detectors are used to provide high energy resolution of the gamma rays. Besides, 4pi configuration is common to get a full coverage of the interaction pointand detection of all the products of the collisions. In this type of experiments, the number of electronic channels can be high (>100) and also the sampling frequency of the digitizing system (>100 Msps). This results in a high data rate per channel (> 2 Gbps) and thus a high aggregated bandwidth to process. In principle, this problem can be solved using a parallel data acquisition system where the input channels (commonly arriving through optical fibers) are read and processed accordingly to its bandwidth capacity. As a result of this limitation a high number of replicated electronics must be used that incur in high costs. However, Ethernet switch technology provides a way to compress the number of input channels taking profit of the high-performance FPGA devices presently available which can manage input link of up to 10 Gbps. So, data aggregationmay increase the compactness of the processing system and reduce the number of replicated electronics. This paper presents the design of an input data mezzanine with four SNAP12 optic linksreceiving 38 2Gbps channels. Inside the mezzanine, 1 to 4 multiplexing aggregation is implemented reducing the 38 input channels to ten 8Gbps output lines through a FMC connector. The FMC Mezzanine can be controlled from a FMC master by SPI with an internal low cost and low power FPGA. This FPGA is seen by the FMC master as a standalone intelligent device without the need of an active slow control.