Thermal management of a 3D packaging structure for superconducting quantum annealing machines

Quantum annealing (QA) is a computing paradigm for solving combinatorial optimization problems by finding the low-energy configurations of complicated Ising models through quantum fluctuation. Recently, because of the strictly limited number of superconducting qubits per chip, three-dimensional (3D) integrated technologies have attracted great attention for realizing a practical large-scale QA machine. Because a cryogenic environment is required for qubit chip operation, the less-effective heat transfer in the stacked structure has become a major concern. In the present paper, a method to realize a sufficiently low temperature for quantum operation in large-scale superconducting QA machines based on 3D packaging technology is proposed and demonstrated numerically. We reveal that the heating in such a 3D structure, which seriously reduces the quantum coherence of qubit chips, is effectively prevented by adding through-silicon vias (TSVs). Accordingly, the temperature of the qubit chip is drastically reduced from 57.8 mK to 16.4 mK. Our results indicate that using TSVs are a powerful and simple approach to realizing practical large-scale superconducting QA machines.